Abstract
Good knowledge of internal circuit states are crucial for efficient post-silicon debug. Due to the area, power, routing and bandwidth limitations trace buffer based design for debug (DfD) hardware provides execution traces of a limited number of state elements which are then usually expanded through signal restoration. In this paper we propose to record combinational execution traces and show that combined with signal restoration better knowledge of internal circuit states are obtained. Our experiment with benchmark circuits show that restoration quality in terms of state restoration ratio is improved up to 48% on average. Extending the solution space by including combinational gates drastically increases signal selection runtime. Using hybrid signal selection methods, we also provide good tradeoff between restoration quality and runtime. By dynamically updating some metrics in state of the art hybrid selection method, we achieve 65% reduction in runtime with only 2% penalty in solution quality. Using the proposed signal selection algorithms, designers can better explore the circuit states and achieve more efficient post-silicon debug.
