Publications

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A hybrid time borrowing technique to improve the performance of digital circuits in the presence of variations

Journal
Mehrnaz Ahmadi, Bijan Alizadeh, Behjat Forouzandeh
IEEE Transactions on Circuits and Systems I: Regular Papers
Year of publication : 2016

A dynamic specification to automatically debug and correct various divider circuits

Journal
Mohammad Hashem Haghbayan, Bijan Alizadeh
INTEGRATION, the VLSI journal
Year of publication : 2016

2015 Index IEEE Transactions on Computers Vol. 64

Journal
EAH Abdulrahman, ME Acacio, J Adikari, AM Ahmed, J Ahn, MI Akbas, Y Al Ridhawi, AM Al-Qawasmeh, S Alawneh, M Aldea, A Alelaiwi, FJ Alfaro, B Alizadeh, L Alvarez, JN Amaral, FJ Andujar-Munoz, UK Anyanwu, C Assi, K Athikulwongse, D Atienza, M Atiquzzaman, MH Au, E Ayguade, R Azarderakhsh, M Azimi, N Badache, DA Bader, S Baek, N Bagherzadeh, H Bahn, R Baldoni, B Bandyopadhyay, T Banerjee, T Banerjee-Mishra, S Banik, W Bao, Y Bao, S Bardhan, A Barnawi, C Barton, A Basak, LA Bathen, AG Bayrak, P Behnam, SF Beldianu, L Benini, NW Bergmann, A Bernasconi, AA Bertossi, MZA Bhuiyan, S Bhunia, K Bian, E Bini, N Bochard, S Bonomi, H Boucheneb, A Boukerche, LD Briceno, P Brisk, AD Brown, J Bruck, S Bruneau, K Bu, R Bunescu, A Burns, C Cai, S Cai, J Cao
IEEE Transactions on Computers
Year of publication : 2016

UPF-based formal verification of low power techniques in modern processors

Conference
Reza Sharafinejad, Bijan Alizadeh, Masahiro Fujita
2015 IEEE 33rd VLSI Test Symposium (VTS)
Year of publication : 2015

Signature oriented model pruning to facilitate multi-threaded processors debugging

Conference
Fatemeh Refan, Bijan Alizadeh, Zainalabedin Navabi
2015 IEEE 33rd VLSI Test Symposium (VTS)
Year of publication : 2015

Multi-objective optimization of floating point arithmetic expressions using iterative factorization

Conference
Alireza Mahzoon, Bijan Alizadeh
2015 IEEE Computer Society Annual Symposium on VLSI
Year of publication : 2015

Low power scheduling in high-level synthesis using dual-Vthlibrary

Conference
Samaneh Ghandali, Bijan Alizadeh, Zainalabedin Navabi
Sixteenth International Symposium on Quality Electronic Design
Year of publication : 2015

In-circuit mutation-based automatic correction of certain design errors using SAT mechanisms

Conference
Payman Behnam, Bijan Alizadeh
2015 IEEE 24th Asian Test Symposium (ATS)
Year of publication : 2015

Groebner basis based formal verification of large arithmetic circuits using gaussian elimination and cone-based polynomial extraction

Journal
Farimah Farahmandi, Bijan Alizadeh
Microprocessors and Microsystems Volume 39, Issue 2, March 2015, Pages 83-96
Year of publication : 2015

B. Cha, University of Southern California K. Chakrabarty, Duke University T. Chakraborty, Qualcomm

Conference
K Chakravadhanula, E Acar, M Agrawal, A Ahmed, B Alizadeh, E Amyeen, D Armstrong, Advantest R Arnold, F Azais, LIRMM K Balanchandran, B Becker, B Benware, P Berndt, Cypress Semiconductor, A Biswas, S Biswas, NVIDIA S Blanton, P Bose, B Brown, Xcerra A Burgmeier, K Butler, J Cadogan, Teradyne Y Cai, J Carulli, M Chandrasekar, K Chandrasekhar, D Chen, L Chen, Oracle W Chen, E Cheng, T Cheng, D Cheng, Xilinx C Cher, CF Chia, C Chiang, V Chikermane, Y Cho, D Corrigan, R Daasch, P Das, S De Carlo, R Desineni, S Deutsch, J Doege, Centtech A Downey, ADAPT D Drmanac, K Dwarakanath, N Fern, G Fey, G Fleeman, B Floyd, T Frank, STMicroelectronics M Fujita, Y Gao, Oracle C Gavin, Xcerra R Geiger, D Gerwitz, A Gharehbaghi, A Ghofrani, G Grimes, G Guglielmo, R Guo, Synopsys S Gupta, S Gurumurthy, AMDN Hakim
2015 IEEE International Test Conference (ITC)
Year of publication : 2015

Analytical performance model for FPGA-based reconfigurable computing

Journal
Hossein Mehri, Bijan Alizadeh
Microprocessors and Microsystems Volume 39, Issue 8, November 2015, Pages 796-806
Year of publication : 2015

A timing error mitigation technique for high performance designs

Conference
Mehrnaz Ahmadi, Bijan Alizadeh, Behjat Forouzandeh
2015 IEEE Computer Society Annual Symposium on VLSI
Year of publication : 2015

2015 Index IEEE Transactions on Very Large Scale Integration (VLSI) Systems Vol. 23

Journal
SM Abbas, G Acconcia, A Afzali-Kusha, N Aghaee, A Aghaie, M Ahmadi, P Ahmadi, A Ajayan, BM Al-Hashimi, TF Al-Somani, D Albano, MK Alghamdi, NBZ Ali, M Alioto, A Alizadeh, B Alizadeh, K Allidina, S Almaadeed, E Alon, T Alshawi, S Alshebeili, HA Alzaher, A Amaravati, E Amat, A Ambede, R Amin, A Amira, B Amrutur, Y An, DM Ancajas, JH Andrian, S Antao, T Aoki, M Arjomand, H Asadi, M Asadinia, K Asanovic, G Ascheid, M Avital, AA Aydiner, R Azarderakhsh, E Azarkhish, A Baghbanbehrouzian
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year of publication : 2015

RTL datapath optimization using system-level transformations

Conference
Samaneh Ghandali, Bijan Alizadeh, Masahiro Fujita, Zainalabedin Navabi
Fifteenth International Symposium on Quality Electronic Design
Year of publication : 2014

Improving polynomial datapath debugging with HEDs

Conference
Somayeh Sadeghi-Kohan, Payman Behnam, Bijan Alizadeh, Masahiro Fujita, Zainalabedin Navabi
2014 19th IEEE European Test Symposium (ETS)
Year of publication : 2014

Highly scalable, shared-memory, Monte-Carlo tree search based Blokus Duo Solver on FPGA

Conference
Ehsan Qasemi, Amir Samadi, Mohammad H Shadmehr, Bardia Azizian, Sajjad Mozaffari, Amir Shirian, Bijan Alizadeh
2014 International Conference on Field-Programmable Technology (FPT)
Year of publication : 2014

Formal verification and debugging of array dividers with auto-correction mechanism

Conference
MH Haghbayan, Bijan Alizadeh, Payman Behnam, Saeed Safari
2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems
Year of publication : 2014

Formal equivalence verification and debugging techniques with auto-correction mechanism for RTL designs

Journal
Bijan Alizadeh, Payman Behnam
Microprocessors and Microsystems Volume 37, Issue 8, Part D, November 2013, Pages 1108-1121
Year of publication : 2014

Effective combination of algebraic techniques and decision diagrams to formally verify large arithmetic circuits

Conference
Farimah Farahmandi, Bijan Alizadeh, Zain Navabi
2014 IEEE Computer Society Annual Symposium on VLSI
Year of publication : 2014

Dynamic flip-flop conversion: A time-borrowing method for performance improvement of low-power digital circuits prone to variations

Journal
Mehrzad Nejat, Bijan Alizadeh, Ali Afzali-Kusha
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year of publication : 2014

Automatic high-level data-flow synthesis and optimization of polynomial datapaths using functional decomposition

Journal
Samaneh Ghandali, Bijan Alizadeh, Masahiro Fujita, Zainalabedin Navabi
IEEE Transactions on Computers ( Volume: 64 , Issue: 6 , June 1 2015 )
Year of publication : 2014

Automatic correction of certain design errors using mutation technique

Conference
Payman Behnam, Bijan Alizadeh, Zainalabedin Navabi
2014 19th IEEE European Test Symposium (ETS)
Year of publication : 2014

Automated formal approach for debugging dividers using dynamic specification

Conference
Mohammad-Hashem Haghbayan, Bijan Alizadeh, Amir-Mohammad Rahmani, Pasi Liljeberg, Hannu Tenhunen
2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
Year of publication : 2014

An analytical dynamic and leakage power model for FPGAs

Conference
Hossein Mehri, Bijan Alizadeh
2014 22nd Iranian Conference on Electrical Engineering (ICEE)
Year of publication : 2014

A scalable formal debugging approach with auto-correction capability based on static slicing and dynamic ranking for RTL datapath designs

Journal
Bijan Alizadeh, Payman Behnam, Somayeh Sadeghi-Kohan
IEEE Transactions on Computers ( Volume: 64 , Issue: 6 , June 1 2015 )
Year of publication : 2014

A probabilistic approach for counterexample generation to aid design debugging

Conference
Payman Behnam, Hossein Sabaghian-Bidgoli, Bijan Alizadeh, Kamyar Mohajerani, Zainalabedin Navabi
East-West Design & Test Symposium (EWDTS 2013)
Year of publication : 2014

A Low-Power Enhanced Bitmask-Dictionary Scheme for Test Data Compression

Conference
Vahid Janfaza, Payman Behnam, Bahjat Forouzandeh, Bijan Alizadeh
2014 IEEE Computer Society Annual Symposium on VLSI
Year of publication : 2014

Harutyunyan G., Shoukourian S., Vardanian V., Zorian Y.

Conference
Vazgen Melikyan, Abraham Balabanyan, Armen Durgaryan, Payman Behnam, Hossein Sabaghian-Bidgoli, Bijan Alizadeh, Kamyar Mohajerani, Zainalabedin Navabi, Elmira Karimi, Mohamad Hashem Haghbayan, Adele Maleki, Mahmoud Tabandeh, V Kharchenko, A Gorbenko, Wajeb Gharibi, VI Hahanov, Anders Carlsson, IV Hahanova, IV Filippenko, V Duzhyi, V Sklyar, A Volkoviy, Aleksandr Timoshenko, Ksenia Lomovskaya, Mikhail Suslov, Eng Gee Lim, Zhao Wang, Gerry Juans, Ka Lok Man, Nan Zhang, Vladimir Hahanov, Eugenia Litvinova, Svetlana Chumachenko, Mishchenko Alexander, Dementiev Sergey, OA Guz, AN Ziarmand, Arefjev A Ngene Christopher Umerah, EI Litvinova, IP Englesy, VA Miz, D Shcherbin, Volodymyr Hahanov, Volodymyr Miz, Baghdadi Ammar Awni Abbas, Palanichamy Manikandan, S Dementiev, A Priymak
East-West Design & Test Symposium (EWDTS 2013)
Year of publication : 2013

A new approach for automatic test pattern generation in register transfer level circuits

Journal
Mohammad Mirzaei, Mahmoud Tabandeh, Bijan Alizadeh, Zainalabedin Navabi
IEEE Design & Test ( Volume: 30 , Issue: 4 , Aug. 2013 )
Year of publication : 2013

Polynomial datapath synthesis and optimization based on vanishing polynomial over Z2mand algebraic techniques

Conference
Samaneh Ghandali, Bijan Alizadeh, Zainalabedin Navabi, Masahiro Fujita
Tenth ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMCODE2012)
Year of publication : 2012
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