I am a master’s student in the School of Electrical and Computer Engineering, College of Engineering at the University of Tehran. I am also a member of the DVDES (Design, Verification, and Debug of Embedded Systems) Lab. I received my B.S. degree in Electrical Engineering from the University of Zanjan in my hometown with a project in the field of robotics and also published a paper about memristive devices.

I am currently working on cache side-channel vulnerabilities. Caches are an essential feature of modern processors architecture. A small quantity of fast (but expensive) memory effectively hides the latency of large and slow (but cheap) main memory. Recent studies on cache-based timing side-channel attacks show an urgent need for thorough investigations of security issues in CPUs. Cache-based side-channel attacks exploit the timing difference between cache hits and misses to detect contention for space in the cache, both between processes or within a process. Though hardware countermeasures based on cache partitioning, randomization, and securing the timing source have been proposed, they all have moderate to heavy performance overhead. Due to recent studies, it seems that the detection of such attacks is more efficient than preventing them. To avoid this performance overhead I’m working on a novel method based on machine learning techniques to efficiently detect cache side-channel attacks in real-time.