Teaching

Current Teaching

• Present2011

  Methodologies and Algorithms for ESL Design Automation

  College of Engineering

• Present2011

  Pre- and Post-silicon Debugging of Digital Systems

  College of Engineering

• Present2011

  Automated Synthesis of Digital Circuits

  College of Engineering

• Present2011

  Electronic System Level (ESL) Design Methodologies

  College of Engineering

• Present2011

  FPGA-based Embedded System Design

  College of Engineering

• Present2011

  Digital System Verification

  College of Engineering

• Grad
  Methodologies and Algorithms for ESL Design Automation

  Course Description

  Modern Integrated Circuits (ICs) are enormously complicated, containing many millions of transistors. Design of these ICs needs software assistance at every stage of the process. The tools used for this task are called electronic design automation (EDA). EDA tools span a very wide range, from purely logical tools that implement and verify functionality, to purely physical tools that create the manufacturing data and verify that the design can be manufactured. This course focuses on data structures and algorithms extensively used in EDA tools. At first we have an overview of basic data structures including Lists, Trees and Graphs. Then we continue with algorithms used in high level and logic synthesis. In the next part, the physical design algorithms, i.e., partitioning, floor-planning, placement and routing are discussed in details.

  Topics

  1- Introduction to Basic Data Structures 2- Decision procedures and their applications 3- High-level synthesis 4- Logic synthesis and optimization techniques

  5- Canonical form of digital circuit representation  6- Datapath optimization techniques (digital signal/image processing) 7- Physical Design

• Grad
  Formal Verification and Debugging of Digital Systems

  Course Description

  Today’s complex digital systems are difficult to verify. On the other hand, the cost of shipping defective products is often prohibitive. Hence, formal methods for the verification and debug of hardware and software have become very important and the last few years have seen the successful deployment of formal methods in many projects, and the launch of several tools based on them. This course provides a comprehensive introduction to three formal verification techniques, i.e., 1) model checking, 2) equivalence checking and 3) theorem proving. In addition, we will discuss post-silicon debugging techniques to verify and debug advanced microprocessors.

  Topics

  1- Property Description Languages 2- Symbol Model (Property) Checking 3- Combinational Equivalence Checking 4- Sequential Equivalence Checking

  5- Theorem Proving 6- Advanced Processor Verification 7- System Level Verification and Debugging

• Grad
  Automated Synthesis of Digital Circuits
• Undergrad
  Electronic System Level (ESL) Design Methodologies

  Course Description

  The design productivity gap is measured as the number of available gates per chip and the number of actually used gates per chip for a given silicon technology. This gap might have been avoided if Electronic System Level (ESL) methodologies would have been deployed in all areas of system level design like specification, synthesis, verification, etc. In other words, the generally accepted solution to this problem is to raise the design abstraction level above Register Transfer Level (RTL), using ESL languages and methodologies. This course focuses on digital system design flow that starts with system level description in MATLAB and then continues with traditional digital design flow. High level synthesis tools enable us to convert system level designs to RTL ones which are then synthesized into gate level using logic synthesis tools. Finally we make use of physical design tools to create a layout which is verified and then fabricated on chip. During this course, we introduce available CAD tools which assist designers to reach the layout in ASIC design or logic on FPGA from high level descriptions in C/C++, SystemC or MatLAB.

  Topics

  1- Introduction to ESL Concepts 2- Using MATLAB/Simulink for FPGA Prototyping 3- From C to RTL Using Chisel

  4- From SystemC to RTL Using CatapultC 5- Generating pipelined designs 6- System Level Design Using Simulink (C to FPGA)

• Undergrad
  FPGA-based Embedded System Design

  Course Description

  In this course we discuss the design of hardware/software systems using processor and other hardware cores. Using configurable cores, as well as customization of available processor cores for specific applications is covered in this course. While discussing various bus and switch structures and available design environments for FPGA and ASIC embedded design environments, the focus of this course will be on using a specific design environment and implementation of designs on an existing FPGA and using a development board for that FPGA.

  Topics

  1- Introduction to Digital System Design Flow 2- Altera FPGA and CAD Tools 3- Elements of Embedded Design 4- User Defined Hardware Cores 5- Embedded Hardware Cores

  6- Communications and Busses (Serial Busses, AMBA, Avalon) 7- Embedded System Implementation 8- Embedded System Design using Nios II Processor 9- Operating System Support for SOPC Design

• Undergrad
  Digital System Verification